Position: Design Verification Engineer

  Telecom/Multimédia


essentielle Verantwortlichkeiten und Aufgaben

Our client is building the world’s fastest AI supercomputer to enable data centers that are more powerful than the human brain. We are looking for talented Verification Engineers to expand International Design Verification team.

Arbeitsplatz:

Remote

Beginndatum:

02.08.2021

Andere Vorraussetzungen:

Qualification requirements:
» Bachelor’s or Master’s in Electrical or Computer Science
» 4 years of Design Verification experience
» Very good understanding of Design Verification goals and challenges
» Ability to adapt to a start-up fast paced dynamic environment
» Excellent communication skills
» Very good knowledge of SystemVerilog and UVM
» Ability to find what can go wrong when everybody else feels safe

Candidates should be able to demonstrate skills, knowledge and experience on a reasonable subset of the following:
» Processors architecture with understanding of execution pipelines
» GPUs or vector processing engines architecture
» Cache hierarchy and MMU architecture
» Cache coherency protocols
» Standard protocols like PCIe and DDR4/5
» Verification environments architecture and implementation
» Verification tools architecture and implementation
» Regression infrastructure architecture and implementation
» Verification process and test plan development
» Assertion-based verification using SVA/OVA
» Functional coverage methodology and implementation
» Formal equivalence checking tools like Jasper
» Theorem provers like ACL2

Complementary experience:
» Debugging complex test scenarios
» Working on FPGA emulated platforms
» Working in a Linux environment
» Using git version control system
» Using a scripting language (Perl or Python)
» Using C programming language
» Using C++ programming language
» Using TCL and Expect